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1. Virtualisation
2. Size optimisation, MM, problem areas
3. Minor Gems: Infrastructure
4. Minor Gems: Architecture

Kernel Log: Coming in 3.0 (Part 3)

Architecture, infrastructure and virtualisation

Thorsten Leemhuis

Six years later than originally expected, the kernel now contains all the essential components for Xen Dom0 operation. In Linux 3.0, the developers are tackling various problems in the ARM code, reboot code and UEFI code; however, Torvalds has slightly disappointedly given up on the code size optimisations.

This has been another week in which Linus Torvalds issued a release candidate of Linux 3.0 late on Monday night. In his release email for RC6, Torvalds points out the inclusion of the Intel isci driver (for example 1) for the SAS controller in Intel's C600 server and workstation chipset, which is due to be released in the coming months. The driver is relatively large. Torvalds was unsure about merging it so late in the development cycle, saying that "I was admittedly a bit doubtful about it, but it's not like it is going to cause regressions for any existing Linux users, so whatever."

Apart from the driver, the developers have only made minor corrections in various places. Torvalds indicated that he is getting to the point where he is thinking about releasing Linux 3.0 "because it's been pretty quiet, and the fixes haven't been earth-shakingly exciting". The Kernel Log will, therefore, continue its report on the advancements of Linux 3.0 by discussing the changes to the kernel's architecture, infrastructure and virtualisation components. In the coming days, the fourth and last part of the "Coming in 3.0" mini series will discuss drivers; part 1 revolved around the kernel's network drivers and infrastructure, and part 2 discussed its filesystems.

Virtualisation

Among the changes the developers have integrated into Linux 3.0 is the storage backend for Xen (for example 1, 2, 3). This means that the kernel has finally acquired all the essential components for hosting guest systems as a Dom0 together with the Xen hypervisor. And that's not everything: the Qemu development branch has, since mid-May, contained all the necessary components to emulate hardware for Xen guests which run via the virtualisation functions available in modern processors (HVM/Hardware-assisted Virtualisation).

Background information on these two changes, which have long been in preparation, is available in various Xen-related blog postings (1, 2, 3, 4, 5, 6). However, the code that has been integrated into the kernel, and into Qemu, is a substantially cut-down and revised version of the code that is currently used in commercial Xen products such as the Xen Server. Hence, the 3.0 kernel with the Xen hypervisor doesn't, for example, offer to pass through USB devices to guests, and Suspend-to-RAM doesn't work either.

Therefore, the Xen developers still have a considerable amount of work to do, but at least they have finally managed the integration of the main components, which had seemed within reach in 2005 – this delay is bound to have contributed to the success of KVM (Kernel-based Virtual Machine) (see also: Xen lets KVM overtake). With Linux 3.0, the kernel's own hypervisor supports VIA processors as well as the virtual Time Stamp Counter (TSC) rate of recent AMD processors. The kernel hackers have also improved the emulator's correctness and performance, says KVM maintainer Avi Kivity in his main Git-Pull request. Furthermore, the "event index" support in the virtio and vhost virtualisation interfaces, which are often used in conjunction with KVM, is designed to reduce overheads in the data exchanges between guests and host.

Architecture code

Also new is the support of Supervisor Mode Execution Protection (SMEP), a feature that will be available with future Intel processors. This feature attempts to prevent ring0 drivers from directly accessing usermode code; Dan Rosenberg has provided some background information on this topic in a blog posting.

Kernel version 3.0 will be the first to support the 64-bit Tilera architecture (TILE-Gx) – a multi-core design by processor vendor Tilera. The Power processor code now supports the PowerEN (Power Edge of Network) family of CPUs that is also known under its codename, "Wirespeed Pro" (wsp); various further new Power features can be found in the main Git-Pull request for the PPC code. The SMP and highmem support for ARM is no longer classified as experimental (1, 2).

Next: Size optimisation, MM, problem areas

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